• IPE consists of Basic IP (comp), extended IP (fft, label, trace) and Original GPU (P-Cube).
• In addition to general image processing, can also handle distance measurement or accelerate intelligent applications such as various recognition processing.
• Each IP uses micro packet processing, and by passing different parameters, can operate as multitude of different functional components.
• Basically performs general image processing through 3 components. These are packaged in 1 IP (comp).
• Extended 3 components perform other types of image processing. These exist as individual IPs (fft,label,trace).
• Image processing which cannot be handled by Basic and Extended IP are taken care of by GPU (P-Cube).
• It is possible to overlap IPs or to embed into users circuits depending on system requirements.

• Function is defined by providing parameters to each component. As translation tables can be controlled minutely, high flexibility is provided.
• Depending on the algorithm, components can be reassembled (scenario description), using  virtual engine to be implemented is defined.
• One of the components, GPU can process operations between engines. From the user, it can be perceived as a component.
• Virtual engine processes as 1 hardware engine. It just needs to be kicked to start processing and this the burden on the CPU is greatly reduced.
• Virtual engine can be simultaneously defined for each application (process). Resolves competing of hardware resources.

• Linking components
  IPE basically uses no software and just hardware processing by linking components so realizes high realtime characteristics as well as low power consumption.　
• Maximum usage of Hardware Bandwidth
  Due to gathering multiple scenarios and division of packets to each component (micro packet control), maximum hardware bandwidth can be used.
  In addition, processing completes with packet unit (in case of image then a line), realizes high realtime characteristics as well as low latency.
• Low power bus architecture
  By having a dedicated data pass which goes directly through components which are used at a high frequency in the order of use, access to external memory is kept to a minimum. Also, by having a cache system whereby the packet size can be stored, access to external memory is further inhibited. Through this structure, can realize below 1/10 the power consumption compared to software processing.

• Virtual engine can be simultaneously defined for each application (process).
  From each application (process) it appears as an independent engine, so resource arbitration between engines through software is unnecessary. Due to this software design can be very simple.

• IPE programming is possible by using the below two methods. Through these environments, software development steps can be greatly reduced (Below 1/3 of general programming steps).
  
  Programming by using General purpose API / OpenVX (Presently under development)
  OpenVX major functions can be executed rapidly by using IPE accelerator.
  
  GUI coding (Presently simple version)
  Parameter setting as well as component assembly (scenario) description through GUI environment is provided.
  Does not require hardware inherent specialized knowledge, possible to code optimally to maximize hardware engine performance.
  Also provide optimization (component linking) tool to maximize hardware performance.
  (Presently under development)

Detailed operation example